VLSI Design Verification and Testing

Dr. Mohammad Tehranipoor--Electrical and Computer Engineering, University of FLorida, Gainesville, FL

Course description:

Introduction to the concepts and techniques of VLSI (Very Large Scale Integration) design verification and testing, details of test economy, fault modeling and simulation, defects, Automatic Test Pattern Generation (ATPG), design for testability, Scan and Boundary scan architectures, built-in self-test (BIST) and current-based testing. Tools are used (in homeworks and projects) for ATPG, DFT, test synthesis and more. Students will use commercial DFT tools such as TetraMax, DFT Compiler and Analyzer, power analysis and management tools such as PrimePower and PowerMill from Synopsys.

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